PC º£À̽ºÀÇ T3 Analyzer
  • M13 ¹× C-Bit Framing Format
  • Ultra T1/E1°ú ÇÔ²² DS3/DS1/DS0 Å×½ºÆ® ¹× ºÐ¼®
  • »ç¿ëÀÚ°¡ ¼±ÅÃÇÑ T1/E1 »ðÀÔ ¹× »èÁ¦
  • °¢°¢ÀÇ DS1/E1¿¡ ´ëÇØ Broadcast ¶Ç´Â Loop Back
  • FEAC¿Í FDL Message µðÄÚµå ¹× Simulate
  • GLÀÇ T1/E1 Å×½ºÆ® Á¦Ç°°ú ȣȯ

 

Ultra T3 Card (PCI)´Â PCÀÇ È®Àå ½½·Ô¿¡ ¼³Ä¡µÇ¾î Digital T3 Input/OutputÀ» Á¦°øÇÔÀ¸·Î½á T3 ½Ã±×³ÎÀ» ºÐ¼®, Å×½ºÆ®, ½Ã¹Ä·¹ÀÌÆ® ¹× ¸ð´ÏÅ͸µ ÇÒ ¼ö ÀÖ°Ô ÇØÁØ´Ù. Ultra T3 Ä«µå´Â T1 (¶Ç´Â E1) ½Ã±×³ÎÀÌ T3 StreamÀ¸·Î »ðÀÔ ¹× ¼ö½ÅµÉ ¼ö ÀÖµµ·Ï ÇϳªÀÇ T1/E1 Input°ú OutputÀ» Á¦°øÇÑ´Ù.

GLÀÇ Ultra T1 Ä«µå¿Í µ¿ÀÏÇÑ PC¿¡ Ultra T3 Ä«µå¸¦ ¼³Ä¡Çϸé DS3, DS1, DS0 ¸ðµÎ¸¦ Å×½ºÆ®ÇÒ ¼ö ÀÖ´Ù. ÇÔ²² Á¦°øµÇ´Â Windows 98/2000 ¼ÒÇÁÆ®¿þ¾î´Â, °£´ÜÇÑ ¹æ¹ýÀ¸·Î Å×½ºÆ®¸¦ ½ÇÇàÇÒ ¼ö ÀÖ°Ô µµ¿ÍÁØ´Ù. DS3 Receiver´Â Non-Intrusive ¹æ¹ýÀ¸·Î DS3 Bit StreamÀ» ¸ð´ÏÅÍÇϸç, PCM ¼Õ»ó°ú ¿¡·¯ ¸Þ½ÃÁö¿¡ ´ëÇÑ Æ÷°ýÀûÀÎ Áø´Ü ³»¿ëÀ» ½Ç½Ã°£À¸·Î º¸¿©ÁØ´Ù. InputÀº DSX-3 Panel¿¡¼­ ¹ß°ß µÈ ½Ã±×³Î ¹× DS3 SourceÀÇ Output°ú ȣȯµÈ´Ù. »ç¿ëÀÚ°¡ ¼±ÅÃÇÑ DS1 (¶Ç´Â E1)Àº T3 Card¿¡ ÀÖ´Â T1/E1 Output¿¡¼­ »ðÀÔ ¹× »èÁ¦ °¡´ÉÇÏ´Ù.

DS3 Transmitter´Â ¿ÜºÎ¿¡¼­ °ø±Þ ¹ÞÀº DS1 (¶Ç´Â E1) Bit StreamÀ» DS3 ½Ã±×³Î·Î Multiplex ½ÃŲ´Ù. M13 Multiplexter¿Í 3/1 Digital Cross Connect SystemÀÇ Stress Test¸¦ ½ÇÇàÇÒ ¼ö ÀÖµµ·Ï, Ultra T3 Ä«µå´Â 28°³ÀÇ DS1 (¶Ç´Â 21°³ÀÇ E1)½Ã±×³ÎÀ» DS3 Output¿¡¼­ »ý¼ºÇÒ ¼ö ÀÖÀ¸¸ç, Output StreamÀ¸·ÎÀÇ ¿¡·¯ »ðÀÔ ±â´É ¿ª½Ã Áö¿øµÈ´Ù.

  • M13°ú C-Bit Framing Format
  • »ó¼¼ÇÑ Logging°ú ÇÔ²² Unframed T3 Bit Error Test
  • T1 (¶Ç´Â E1) ½Ã±×³Î »ðÀÔ ¹× »èÁ¦ / ¿¡·¯ »ðÀÔ ±â´É
  • T1s (¶Ç´Â E1s)¸¦ LoopbackÀ̳ª Broadcast »óÅ·ΠÀ¯ÁöÇϸ鼭 »ç¿ëÀÚ°¡ ¼±ÅÃÇÑ T1 (¶Ç´Â E1) ¼Û½Å ¹× ¼ö½Å ±â´É
  • ¸ðµç Alarm°ú ºñÁ¤»óÀûÀÎ À̺¥Æ®¿¡ ´ëÇØ ½Ç½Ã°£À¸·Î Non-Intrusive ¸ð´ÏÅ͸µ ¹× Time-Stamped Log
  • Internal ¶Ç´Â Recovered Clock Source
  • ANSI FEAC Á¦¾È¿¡ µû¸¥ FEAC Message ¼Û¼ö½Å ±â´É
  • FDLÀ» ÅëÇØ HDLC ÇüÅÂÀÇ ¸Þ½ÃÁö ¼Û¼ö½Å
  • T3 Level°ú Frequency ÃøÁ¤
Physical Interface
T3 Signal
Male BNC Connector
T1/E1 Signal
RJ48c Connector
PC Interface
PCI 2.1 Compliant
T3 Line Interface
¶óÀÎÄÚµå ÇüÅÂ
B3ZS
Framing ÇüÅÂ
M13, C-Bit, Unframed
Input Frequency
44.736 Mbps
¼ö½ÅºÎ Interface
DSX-3 (Terminate ¶Ç´Â Monitor)
Input ÀÓÇÇ´ø½º
75 Ohms
Input ·¹º§
Terminate: 0.09 Vp - 0.85VpMonitor: 0.025 - 0.08 Vp (Nominal DSX¿¡ µû¶ó 26dB±îÁö Flat Loss)
Output ·¹º§
DSX: TR-TSY-0004999,0.75-0.85 Vp
Output Ŭ·°¼Ò½º
Recovered ¶Ç´Â Internal
T3 Transmitter
Transmit ¼Ò½º
Receiver ¶Ç´Â Internal¿¡¼­ Loop
Payload
-Unframed test patterns: 2?23-1, 2?20-1, 2?15-1, 1111, 1100, 1010, 1000, 0000, 24-bit±îÁö »ç¿ëÀÚÁ¤ÀÇ.DS3 output¿¡ ¿ÜºÎ DS1 (or E1) »ðÀÔ(DS1 (or E1s) Broadcast, Looped ¶Ç´Â AIS Àü¼Û À¯Áö)
Error Insertion
FEBE, Parity, C-bit Parity, M-bit, F-bit, Line Code Violation, ½Ã±×³Î ·Î½º
T3 Receiver
Alarms Monitor
½Ã±×³Î¼Õ½Ç, ÇÁ·¹ÀÓ¼Õ½Ç,OOF, AIS, Idle
Error Counters
Line Code Violation, Frame, P-Bit Parity, C-Bit Parity, FEBE, °úµµÇÑ 0
Level ¹× Frequency
¼ö½Å µÈ T3 ½Ã±×³Î¿¡ ´ëÇØ Level°ú Frequency ¸ð´ÏÅÍ
Drop and Insert from T3
Drop
¼ö½Å µÈ DS3¿¡¼­ ÀÓÀÇÀÇ DS1 (¶Ç´Â E1) Drop
Insert
Àü¼ÛµÇ´Â DS3 Áß ÀÓÀÇ/Àüü Timeslot¿¡ DS1 (¶Ç´Â E1) ȤÀº AIS »ðÀÔ
T3 FDL
HDLC ÇüÅÂÀÇ ¸Þ½ÃÁö ¼Û¼ö½Å
T3 FEAC
Block Oriented Code Àü¼Û ¹× ¸ð´ÏÅÍ
T1/E1 Line Interface
Line Code ÇüÅÂ
AMI ¶Ç´Â B8ZS (T1), HDB3 (E1)
Input Frequency
1.544Mbps (T1) ¶Ç´Â 2.048Mbps (E1)
¼ö½ÅºÎInterface
Terminate
Input ÀÓÇÇ´ø½º
100Ohms (T1), 120Ohms (E1)
Input Level
+75 mV to 6.0 V base to peak or -30 dBsX to +6 dBsX
Output Level
+3.0 +/-0.2 Base to Peak 0~655ft ¼±ÅÃ. T1 Short Haul¿¡ Pule Equalization ¼³Á¤/ T1 Long Haul¿¡ Line Build Out